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Well established fabs and processes with a broad range of features in the following processes: 0.5u, 0.35u, 180nm, 130nm and 90nm (deeper sub-microns are available too)
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High performance libraries covering both high speed and low power requirements suitable for any FPGA/CPLD conversion
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Up to multimillion gates supported
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More than 512 Kbit DPRAM supported
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Compatible with the latest and largest FPGA chips from vendors such as Altera and Xilinx
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Drop-in ASIC: Full pin-to-pin compatible to the customer's FPGA Pin-Out
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VDD, from 5V down to 1.5V
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Support for commercial, industrial and military grades
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I/O standards such as: TTL, CMOS, LVCMOS, GTL, PCI, LVDS, HSTL, LVPECL and more
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Full ESD and latch-up protection for I/Os
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Drive strength such as: 2mA, 4mA, 6mA, 12mA, 18mA, 24mA, 48mA
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Multiple voltage support
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Noise & EMC immunity features
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Support for various types of special cells such as PLLs, DLLs, ADPLLs, multipliers, power-on-reset and a broad range of IPs
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Assembly options: single die, multi die, stack-on, side by side and more
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Packages support: SOIC, QFP, BGA, PGA, QFN, DIP and more
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Full support for all DFT structures: Standards such as SCAN, JTAG, BIST and custom test structures according to the customer's request and/or design requirements
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Full ATPG (Automatic Test Pattern Generation) support for DFT
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Up to 500 MHz Clocks
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Full system clocks synthesis tools
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Mixed signal and custom analog cells support
Custom low power design for specific modules.
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