Functionality Guaranteed (No Good, No Pay!), because:

• No RTL touch: KaiSemi's process doesn't involve the source code.

• The fact that we Use ONLY the netlist of the proven working FPGA maintains the functionality

• The use of proven in house developed automated conversion tools limits human errors.

No NRE Payment, because:

• In our business model you pay only for the chip products based on minimum quantity ordering.

Fastest cycle-time, because:

• We shorten the ASIC flow cycle through the use of an automated process and by starting the process from the netlist stage

• We limit the need for customer's involvement in the RTL flow, synthesis, verifications and back-annotations

• We have well established and coherent work flow with fabs.

Any size  and Any Type of FPGA FPGA, because:

• KaiSemi conversion tools handle any size and any type of FPGA with no limit on netlist size.

No customer intervention, because:

• The Customer is required to provide two main receivables:

1. The FPGA netlist

2. Verification test vectors.

From that point onwards, we proceed in a "posted" mode and perform the whole ASIC process until we provide a final working chip.